Matches 201 - 250 out of 17311 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
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7393789 Protective coating for planarization  
Various pattern transfer and etching steps can be used to create features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed,...
7393785 Methods and apparatus for forming rhodium-containing layers  
A method of forming a rhodium-containing layer on a substrate, such as a semiconductor wafer, using complexes of the formula L y RhY z is provided. Also provided is a chemical vapor co-deposited...
7393783 Methods of forming metal-containing structures  
The invention includes methods of forming metal-containing layers. The layers can, in particular aspects, consist essentially of metal, or consist of metal. The desired layers can be formed by...
7393770 Backside method for fabricating semiconductor components with conductive interconnects  
A backside method for fabricating a semiconductor component with a conductive interconnect includes the step of providing a semiconductor substrate having a circuit side, a backside, and a...
7393753 Method for forming a storage cell capacitor compatible with high dielectric constant materials  
Described are integrated circuit electrodes and method for fabricating an electrode, which include, in an embodiment forming a silicon, first portion of the electrode in a lower region of a...
7393743 Methods of forming a plurality of capacitors  
The invention includes methods of forming a plurality of capacitors. In one implementation, a plurality of capacitor electrode openings is formed over a substrate. Individual of the capacitor...
7393741 Methods of forming pluralities of capacitors  
The invention comprises methods of forming pluralities of capacitors. In one implementation, metal is formed over individual capacitor storage node locations on a substrate. A patterned masking...
7393736 Atomic layer deposition of Zrx Hfy Sn1-x-y O2 films as high k gate dielectrics  
The use of atomic layer deposition (ALD) to form a nanolaminate dielectric of zirconium oxide (ZrO 2 ), hafnium oxide (HfO 2 ) and tin oxide (SnO 2 ) acting as a single dielectric layer with a...
7393563 Plasma enhanced chemical vapor deposition method of forming titanium silicide comprising layers  
Chemical vapor deposition methods of forming titanium suicide including layers on substrates are disclosed. TiCl 4 and at least one silane are first fed to the chamber at or above a first...
7393562 Deposition methods for improved delivery of metastable species  
A method of providing material into a deposition chamber is provided. A reservoir is in fluid communication with the deposition chamber. A metastable specie is provided and contained within the...
7392584 Methods and apparatus for a flexible circuit interposer  
Methods and apparatus for testing a semiconductor device are disclosed. A flexible circuit interposer includes a flexible circuit substrate which allows in-situ probing of an attached device...
D571684 Storage device bracelet  
7392436 Program failure recovery  
A method of operating a memory device when a program failure occurs is provided. The method includes preserving first data within the memory device and reconstructing second data originally...
7392331 System and method for transmitting data packets in a computer system having a memory hub architecture  
A system and method for transmitting data packets from a memory hub to a memory controller is disclosed. The system includes an upstream reception port coupled to an upstream link. The upstream...
7392274 Multi-function floating point arithmetic pipeline  
A scalable engine having multiple datapaths, each of which is a unique multi-function floating point pipeline capable of performing a four component dot product on data in a single pass through the...
7391904 Correlation-based color mosaic interpolation adjustment using luminance gradients  
Processing a digitized image signal includes selectively adjusting interpolated color values on the basis of correlations between pre-identified reference patterns of values and the patterns of...
7391666 DRAM power bus control  
A dynamic random access memory (DRAM) is provided that has separate array and peripheral power busing to isolate array noise from peripheral circuits such as delay lock loops during row activations...
7391654 Memory block erasing in a flash memory device  
The erase and verify method performs an erase operation and an erase verify read operation. If the erase verify read operation fails because unerased memory cells have been found, a normal memory...
7391648 Low voltage sense amplifier for operation under a reduced bit line bias voltage  
A regulated charge pump, regulated by a plurality of capacitor boost stages and separate from the memory device supply voltage (V cc ), generates a regulated voltage (V SA ) over a range of supply...
7391637 Semiconductor memory device with high permeability composite films to reduce noise in high speed interconnects  
A memory device is provided with a structure for improved transmission line operation on integrated circuits. The structure for transmission line operation includes a first layer of electrically...
7391466 Camera module with dust trap  
A camera module for capturing an image. The camera module including an image sensor including a die mounted on a substrate, a housing coupled with the substrate to substantially enclose the die,...
7391243 Low power and low timing jitter phase-lock loop and method  
A phase-lock loop generates an output clock signal from an input clock signal. The output clock signal is coupled through a clock tree and is fed back to a phase detector, which compares the phase...
7391117 Method for fabricating semiconductor components with conductive spring contacts  
An interconnect for testing a semiconductor component includes a substrate, and interconnect contacts on the substrate configured to electrically engage component contacts on a semiconductor...
7391072 Programmable array logic or memory with p-channel devices and asymmetrical tunnel barriers  
Structures and methods for programmable array type logic and/or memory with p-channel devices and asymmetrical low tunnel barrier intergate insulators are provided. The programmable array type...
7391070 Semiconductor structures and memory device constructions  
The invention includes a semiconductor structure having a gateline lattice surrounding vertical source/drain regions. In some aspects, the source/drain regions can be provided in pairs, with one of...
7391066 Imager floating diffusion region and process for forming same  
The present invention provides an imager device with a floating diffusion region resistant to charge leakage. The floating diffusion region is formed having a first doped region and a second doped...
7391008 Method and system for wavelength-dependent imaging and detection using a hybrid filter  
Apparatus and methods for wavelength-dependent detection are provided. A detector includes a hybrid filter having unpatterned and patterned filter layers and at least one light-detecting sensor...
7390756 Atomic layer deposited zirconium silicon oxide films  
A dielectric layer containing an atomic layer deposited zirconium silicon oxide film disposed in an integrated circuit and a method of fabricating such a dielectric layer provide a dielectric layer...
7390746 Multiple deposition for integration of spacers in pitch multiplication process  
Pitch multiplication is performed using a two step process to deposit spacer material on mandrels. The precursors of the first step react minimally with the mandrels, forming a barrier layer...
7390740 Sloped vias in a substrate, spring-like contacts, and methods of making  
Methods for forming vias are disclosed. The methods include providing a substrate having a first surface and an opposing, second surface. The vias are formed within the substrate to have a...
7390738 Fabrication of semiconductor devices using anti-reflective coatings  
Techniques are disclosed for fabricating a device using a photolithographic process. The method includes providing a first anti-reflective coating over a surface of a substrate. A layer which is...
7390712 Methods of enhancing capacitors in integrated circuits  
Systems, devices, structures, and methods are described that inhibit dielectric degradation at high temperatures. An enhanced capacitor is discussed. The enhanced capacitor includes a first...
7390710 Protection of tunnel dielectric using epitaxial silicon  
Layers of epitaxial silicon are used to protect the tunnel dielectric layer of a floating-gate memory cell from excessive oxidation or removal during the formation of shallow trench isolation (STI)...
7390690 Imager light shield  
An improved imager pixel arrangement having a light shield over the pixel circuitry, but below the conductive interconnect layers of the pixel. The light shield can be a thin film of opaque (or...
7390687 Microelectronic imagers with shaped image sensors and methods for manufacturing microelectronic imagers  
Microelectronic imagers with shaped image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device comprises an imaging die having a substrate,...
7390685 Ultra-shallow photodiode using indium  
The invention provides an imager having a p-n-p photodiode with an ultrashallow junction depth. A p+ junction layer of the photodiode is doped with indium to decrease transient enhanced diffusion...
7389581 Method of forming compliant contact structures  
A compliant contact structure and contactor card for operably coupling with a semiconductor device to be tested includes a substantially planar substrate with a compliant contact formed therein....
7389465 Error detection and correction scheme for a memory device  
Data is read from a memory array. Before being stored in a data buffer, a Hamming code detection operation and a Reed-Solomon code detection operation are operated in parallel to determine if the...
7389451 Memory redundancy with programmable control  
A redundancy scheme for a memory is disclosed that is programmable both before and after the memory device is packaged and/or installed in a system. This is preferably accomplished by using...
7389369 Active termination control  
A method and apparatus are provided for active termination control in a memory. In an embodiment, the memory turns on active termination based on information programmed into one or more mode...
7389364 Apparatus and method for direct memory access in a hub-based memory system  
A memory hub for a memory module having a DMA engine for performing DMA operations in system memory. The memory hub includes a link interface for receiving memory requests for access at least one...
7388801 Reduction of fusible links and associated circuitry on memory dies  
The number of fusible links and other circuit components required to provide memory cell redundancy are reduced by sharing physical memory locations among address banks that store memory addresses....
7388794 Individual I/O modulation in memory devices  
A DRAM circuit with reduced power consumption and in some circumstances faster memory array access speed. Input/output lines connected to a memory array are sensed according to their...
7388789 NAND memory device and programming methods  
A NAND Flash memory device is described that can reduce circuitry noise during program operations. The memory includes bit lines that can be electrically coupled together to charge share their...
7388779 Multiple level programming in a non-volatile device  
The programming method of the present invention minimizes program disturb by initially programming cells on the same wordline with the logical state having the highest threshold voltage. The...
7388608 Sample and hold circuit and active pixel sensor array sampling system utilizing same  
An active pixel sensor array sampling system includes a plurality of video circuits and reset circuits. A video circuit generates a video voltage from each one of the pixels of a column of pixels....
7388462 Integrated circuit inductors  
The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of...
7388391 Method for evaluating at least one electrical conducting structure of an electronic component  
An apparatus and method for evaluating the integrity of each contact pin of an electronic component having multiple contact pins. In one embodiment, the apparatus includes a test device and a...
7388294 Semiconductor components having stacked dice  
A semiconductor package component includes a base die and a secondary die flip chip mounted to the base die. The base die includes a set of stacking contacts for flip chip mounting the secondary...
7388290 Spacer patterned, high dielectric constant capacitor and methods for fabricating the same  
A high dielectric constant memory cell capacitor and method for producing the same, wherein the memory cell capacitor utilizes relatively large surface area conductive structures of thin spacer...
Matches 201 - 250 out of 17311 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >