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7362637 Current switching sensor detector  
A sensor for a switching circuit detects the logical state of the switching circuit by monitoring the current flow through the switching circuit. The current flow is conditioned by one or more...
7362634 Built-in system and method for testing integrated circuit timing parameters  
A built-in self-test system for a dynamic random access memory device using a data output register of the memory device to apply test signals to data bus terminals and a data strobe terminal of the...
7362627 Method and apparatus for synchronizing data from memory arrays  
According to one embodiment, a combination is comprised of a plurality of sense amps, each having an input for receiving a clock signal. A data bus is for receiving data from the plurality of sense...
7362619 Data strobe synchronization circuit and method for double data rate, multi-bit writes  
A data strobe synchronization circuit includes first and second logic circuits receiving global data strobe pulses and respective enable signal. A control circuit initially applies an enable signal...
7362611 Non-volatile memory copy back  
Data move operations in a memory device are described that enable identification of data errors. During a write operation, identified errors are flagged and used to provide an error status during...
7362113 Universal wafer carrier for wafer level die burn-in  
A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer,...
7362111 Device for evaluating at least one electrical conducting structure of an electronic component  
An apparatus and method for evaluating the integrity of each contact pin of an electronic component having multiple contact pins. In one embodiment, the apparatus includes a test device and a...
7361928 Doped aluminum oxide dielectrics  
Doped aluminum oxide layers having a porous aluminum oxide layer and methods of their fabrication. The porous aluminum oxide layer may be formed by evaporation physical vapor deposition techniques...
7361862 Laser marking system for dice carried in trays and method of operation  
A laser marking system for IC packages including a tray input shuttle assembly and a tray transport borne by a transport actuator for moving a tray carrier carrying a tray of unmarked packaged ICs...
7361614 Method of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry  
This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of...
7361596 Semiconductor processing methods  
The invention includes methods of forming titanium-containing materials, such as, for example, titanium silicide. The invention can use alternating cycles of titanium halide precursor and one or...
7361569 Methods for increasing photo-alignment margins  
Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines...
7361559 Manufacturing method for a MOS transistor comprising layered relaxed and strained SiGe layers as a channel region  
The invention includes non-volatile memory and logic devices associated with crystalline Si/Ge. The devices can include TFT constructions. The non-volatile devices include a floating gate or...
7361234 Photolithographic stepper and/or scanner machines including cleaning devices and methods of cleaning photolithographic stepper and/or scanner machines  
Stepper and/or scanner machines including cleaning devices and methods for cleaning stepper and/or scanner machines are disclosed herein. In one embodiment, a stepper and/or scanner machine...
7361078 Subpad support with releasable subpad securing element and polishing apparatus  
A subpad support for use in a web format or belt format polishing apparatus for polishing one or more layers of semiconductor device structures. The subpad support includes a subpad retention...
D566709 Storage device  
7360011 Memory hub and method for memory system performance monitoring  
A memory module includes a memory hub coupled to several memory devices. The memory hub includes at least one performance counter that tracks one or more system metrics-for example, page hit rate,...
7360006 Apparatus and method for managing voltage buses  
The present technique relates to a method and apparatus for managing voltage buses. In a memory device, such as SRAM or DRAM, a periphery voltage bus may supply voltage to periphery circuitry and...
7359607 Waveguide for thermo optic device  
A waveguide and resonator are formed on a lower cladding of a thermo optic device, each having a formation height that is substantially equal. Thereafter, the formation height of the waveguide is...
7359258 Semiconductor memory with wordline timing  
A semiconductor memory with wordline timing, which links activating a wordline to an isolation signal. The isolation signal is applied to a memory section adjacent the memory section containing the...
7359243 Memory cell repair using fuse programming method in a flash memory device  
A method for repairing cells of a flash memory array includes using a fuse memory array circuit. The fuse memory cells are initially programmed. The locations of defective memory cells of the main...
7359241 In-service reconfigurable DRAM and flash memory device  
A memory cell that has both a DRAM cell and a non-volatile memory cell. The non-volatile memory cell might include a flash memory or an NROM cell. The memory cell is comprised of a vertical...
7358872 Method and apparatus for converting parallel data to serial data in high speed applications  
A method and apparatus to convert parallel data to serial data. More specifically, there is provided a parallel-to-serial converter comprising a data pipeline configured to receive parallel data,...
7358751 Contact pin assembly and contactor card  
A compliant contact pin assembly and a contactor card system are provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin...
7358596 Device isolation for semiconductor devices  
Exemplary embodiments of the present invention disclose a semiconductor assembly having at least one isolation structure formed. The semiconductor assembly comprises: a first trench in a...
7358587 Semiconductor structures  
In one aspect, the invention includes a method of forming a material within an opening, comprising: a) forming an etch-stop layer over a substrate, the etch-stop layer having an opening extending...
7358568 Low resistance semiconductor process and structures  
A process for forming a semiconductor device comprises the steps of providing a semiconductor substrate assembly comprising a semiconductor wafer having an active area formed therein, a plurality...
7358562 NROM flash memory devices on ultrathin silicon  
An NROM flash memory cell is implemented in an ultra-thin silicon-on-insulator structure. In a planar device, the channel between the source/drain areas is normally fully depleted. An oxide layer...
7358561 Source lines for NAND memory devices  
A NAND memory device has a source line connected to two or more columns of serially-connected floating-gate transistors. The source line includes a first conductive layer formed on a substrate and...
7358554 Semiconductor manufacturing apparatus for modifying-in-film stress of thin films, and product formed thereby  
An apparatus for depositing a thin film on a substrate and product produced thereby are disclosed. In particular, deposition of the thin film is carried out on the substrate having an applied...
7358553 System and method for reducing shorting in memory cells  
An MRAM device includes an array of magnetic memory cells having an upper conductive layer and a lower conductive layer separated by a barrier layer. To reduce the likelihood of electrical shorting...
7358517 Method and apparatus for imager quality testing  
An apparatus and method of detecting a defect in an imager die package. The method comprises the steps of exposing the imager die package to light at a first angle, exposing the imager die package...
7358188 Method of forming conductive metal silicides by reaction of metal with silicon  
The invention includes methods of forming conductive metal silicides by reaction of metal with silicon. In one implementation, such a method includes providing a semiconductor substrate comprising...
7358185 Device having contact pad with a conductive layer and a conductive passivation layer  
A method and apparatus is disclosed for sequential processing of integrated circuits, particularly for conductively passivating a contact pad with a material which resists formation of resistive...
7358178 Semiconductor substrates including I/O redistribution using wire bonds and anisotropically conductive film, methods of fabrication and assemblies including same  
Methods and apparatus for eliminating wire sweep and shorting while avoiding the use of under-bump metallization and high cost attendant to the use of conventional redistribution layers. An...
7358171 Method to chemically remove metal impurities from polycide gate sidewalls  
An embodiment includes a process of forming a gate stack that acts to resist the redeposition to the semiconductive substrate of mobilized metal such as from a metal gate electrode. An embodiment...
7358170 Methods of forming conductive interconnects, and methods of depositing nickel  
The invention includes methods of electroless plating of nickel selectively on exposed conductive surfaces relative to exposed insulative surfaces. The electroless plating can utilize a bath which...
7358161 Methods of forming transistor devices associated with semiconductor-on-insulator constructions  
The invention encompasses a method of forming a semiconductor on-insulator construction. A substrate is provided. The substrate includes a semiconductor-containing layer over an insulative mass....
7358154 Method for fabricating packaged die  
Methods for forming an edge contact on a die and edge contact structures are described. The edge contacts on the die do not increase the height of the die. The edge contacts are positioned on the...
7358146 Method of forming a capacitor  
A carbon containing masking layer is patterned to include a plurality of container openings therein having minimum feature dimensions of less than or equal to 0.20 micron. The container openings...
7358139 Method of forming a field effect transistor including depositing and removing insulative material effective to expose transistor gate conductive material but not transistor gate semiconductor material  
The invention includes methods of forming field effect transistors. In one implementation, a method of forming a field effect transistor having a gate comprising a conductive metal or metal...
7358131 Methods of forming SRAM constructions  
The invention includes SRAM constructions comprising at least one transistor device having an active region extending into a crystalline layer comprising Si/Ge. A majority of the active region...
7358117 Stacked die in die BGA package  
Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
7358103 Method of fabricating an imaging device for collecting photons  
A photon collector has a reflecting metal layer to increase photon collection efficiency in a solid state imaging sensor. The reflecting metal layer reflects incident light internally to a...
7357695 Systems and methods for mechanical and/or chemical-mechanical polishing of microfeature workpieces  
Systems and methods for polishing microfeature workpieces. In one embodiment, a method includes determining a status of a characteristic of a microfeature workpiece and moving a carrier head and/or...
7356723 Method and apparatus for data transfer  
A memory system and method according to various aspects of the present invention comprises a memory and an adaptive timing system for controlling access to the memory. The adaptive timing system...
7355922 Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM  
A method of synchronizing counters in two different clock domains within a memory device is comprised of generating a start signal for initiating production of a running count of clock pulses of a...
7355920 Write latency tracking using a delay lock loop in a synchronous DRAM  
A method and circuitry for improved write latency tracking in a SDRAM is disclosed. In one embodiment, a delay locked loop is used in the command portion of the write path, and receives the system...
7355894 Programming flash memories  
A flash memory device has an array of flash memory cells, a detector for detecting an external voltage applied to the flash memory device, and a command control circuit for controlling access to...
7355464 Apparatus and method for controlling a delay- or phase-locked loop as a function of loop frequency  
A method and circuitry for a Delay Locked Loop (DLL) or a phase Locked Loop (PLL) is disclosed, which improves the loop stability at high frequencies and allows maximum tracking bandwidth,...